Graphene is a carbon allotrope and represents the basic structural element of all other carbon allotropes, including graphite, charcoal, diamond, etc. In general, as shown in FIG. 1, graphene has a two-dimensional, atomic-scale structure in which carbon atoms are arranged in a regular hexagonal pattern with one carbon atom forming each vertex. Graphene has several extraordinary properties, including a strength substantially greater than steel, the ability to efficiently conduct heat and electricity, reported electron mobilities greater than 15,000 cm2/Vs, as well as being the only known solid material in which every atom is available for chemical reaction from two sides due to the two-dimensional structure. As such, graphene can be considered the thinnest electronic material, merely one atom thick and nearly transparent with very high carrier mobilities, whereby graphene should enable transistors operating at very high frequencies. For example, FIG. 2A depicts a top-gated field-effect transistor (FET) fabricated on a two-inch graphene wafer, with graphene epitaxially formed on a silicon (Si) face of a semi-insulating, high-purity silicon carbide (SiC) wafer through thermal annealing at 1450 degrees Celsius. As shown in FIG. 2B, the top-gated graphene FET shown in FIG. 2A demonstrated a 53 GHz cutoff frequency for a 550 nanometer (nm) gate and a cutoff frequency as high as 100 GHz for a 240 nm gate at Vd=2.5V. However, as shown in FIG. 2C, the top-gated graphene FET shown in FIG. 2A cannot turn the transistor off at a gate voltage (Vg) between −3V and 3V due to the absence of a band gap in graphene, meaning that the top-gated graphene FET shown in FIG. 2A is not suitable for digital logic applications due to the substantial source-to-drain current.
Accordingly, because a graphene FET must have the ability to turn the transistor off at a gate voltage between −3V and 3V to enable use in digital logic applications, the existing graphene FET results that are known to-date are all limited to analog chips. One option to capture electrons in a graphene channel may comprise p-type doping, which refers to a process to intentionally introduce impurities into an extremely pure material (such as graphene) in order to modulate the electrical properties associated therewith. For example, FIG. 3 illustrates an exemplary transistor structure 10 that employs p-type doping to introduce nitrogen impurities 22, 24, 26, into a graphene channel 14 and thereby create deficiencies in valence electrons called “holes” in an attempt to capture electrons in the graphene channel 14. As such, the nitrogen impurities 22, 24, 26 introduced into the graphene channel 14 causes some electrons that flow from a source 12 to a drain 16 to scatter, as depicted at 32, 34, 36, while other electrons flow through the channel undisturbed, as depicted at 38. Accordingly, although p-type doping may be an option to capture electrons in the transistor channel 14, empirical graphene FET simulations show that electron mobility drops from ˜1330 cm2/Vs to ˜250 cm2/Vs with p-type doping (i.e., about a 5× current decrease), which still does not provide sufficient performance benefits to realize digital logic applications. As such, the semiconductor industry has still not found a way to give graphene the important bandgap required to fabricate digital logic, and thus graphene-based processors.